Commit 83e9ae0

Ansari <ping@ansari.wtf>
2026-08-24 11:27:16
Adding readme
1 parent bcbb0c1
Changed files (1)
README.md
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+# cddx2yaml
+
+[Circuit Diagram](https://www.circuit-diagram.org/) ([GitHub](https://github.com/circuitdiagram/circuitdiagram)) is a perfectly serviceable schematic editor. This is not that. This is a Go tool that unpacks their `.cddx` files into YAML because I got tired of treating screenshots as a data format to AI agents.
+
+## Why
+
+Drawing circuits in Circuit Diagram is fine. Debugging them by copy-pasting PNGs into an LLM is not. The model squints at your GND symbol, invents a pinout, and you spend twenty minutes arguing with a JPEG.
+
+`.cddx` already has the netlist. It's just buried in a zip of XML that no agent wants to chew on and also its not perfect. So cddx2yaml dumps components, values, pins, and connections as text so something that can actually *read* can tell you that you wired VCC to a GPIO and called it a day.
+
+## Install
+
+Grab a binary from [Releases](https://github.com/The-Robin-Hood/cddx2yaml/releases) Or clone it and `go build`. I'm not your package manager.
+
+## Usage
+
+```
+cddx2yaml [input.cddx] [output.yaml]
+cddx2yaml --version
+```
+
+Defaults: `circuit.cddx` → `circuit.yaml`
+
+## Output
+
+```yaml
+cddx2yamlVersion: "0.1.0"
+circuitDiagramVersion: "1.4"
+components:
+  - id: RES-1
+    type: resistor
+    value: "4700"
+    pins: [a, b]
+connections:
+  - [RES-1.a, CAP-1.b]
+```
+
+IDs are auto-assigned (`RES-1`, `CAP-1`, `IC-1`, …). Nets are lists of `COMPONENT.PIN`. Dangling wires get dropped with a warning. Layout, rotation, and pretty pictures are not included. You already have an editor for that.
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